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CMPC2M09 - ARCHITECTURES AND OPERATING SYSTEMS

Module Code:
CMPC2M09
Department:
Computing Sciences
Credit Value:
20
Level:
2
Organiser:
Dr. Barry Theobald
This module studies the organization of both the system software and the underlying hardware architecture in modern computer systems. The role of concurrent operation of both hardware and software components is emphasized throughout, and the central concepts of the module are reinforced by practical work involving Lego robots and Java programming exercises.

The module is managed using Blackboard. Copies of lecture slides will be made available on the day of the lecture at the latest. Tutorial sheets will be distributed prior to workshops. Student numbers will be limited to 20 at workshops and laboratories. Laboratory work will be undertaken in the Lewin laboratory.


The library catalogue currently lists 120 records on Computer Architecture and 110 records on Operating Systems. These are mainly to be found at QA 76. The library holds copies of the course texts (but the latest edition may not yet be available).

Required purchases:

  • Tanenbaum,A.S., Modern Operating Systems, Pearson Education Inc. ISBN 013600663
  • Stallings,W. Computer Organization and Architecture: Designing for Performance, Pearson Education,  ISBN 0131856448

Possible alternative purchases:

  • Dowsing,R. D. and Marshall, M. Computers: from Logic to Architecture McGraw-Hill, ISBN 0077095847
  • Williams,R. Computer Systems Architecture: A Networking Approach Pearson Education,  ISBN 0321340795

Submission:

Written coursework should be submitted by following the standard CMP practice. Students are advised to refer to the Guidelines and Hints on Written Work in CMP.

Deadlines:

If coursework is handed in after the deadline day or an agreed extension:
 

 

Work submitted Marks deducted
After 15:00 on the due date and before 15:00 on the day following the due date 10 marks
After 15:00 on the second day after the due date and before 15:00 on the third day after the due date 20 marks
After 15:00 on the third day after the due date and before 15:00 on the 20th day after the due date.  All the marks the work merits if submitted on time (ie no marks awarded) 
After 20 working days Work will not be marked and a mark of zero will be entered


Saturdays and Sundays will NOT be taken into account for the purposes of calculation of marks deducted.

All extension requests will be managed through the LTS Hub. A request for an extension to a deadline for the submission of work for assessment should be submitted by the student to the appropriate Learning and Teaching Service Hub, prior to the deadline, on a University Extension Request Form accompanied by appropriate evidence. Extension requests will be considered by the appropriate Learning and Teaching Service Manager in those instances where (a) acceptable extenuating circumstances exist and (b) the request is submitted before the deadline. All other cases will be considered by a Coursework Coordinator in CMP.

For more details, including how to apply for an extension due to extenuating circumstances download Submission for Work Assessment (PDF, 39KB)
 

Plagiarism:

Plagiarism is the copying or close paraphrasing of published or unpublished work, including    the work of another student; without due acknowledgement. Plagiarism is regarded a serious offence by the University, and all cases will be investigated. Possible consequences of plagiarism include deduction of marks and disciplinary action, as detailed by UEA's Policy on Plagiarism and Collusion.


Module specific:

  • To become familiar with the basic function and structure of an operating system kernel.
  • To be understand how a processor’s ALU and control unit are implemented.
  • To develop a practical understanding of issues in basic I/O programming.
  • To be familiar with basic patterns of reliable communication between asynchronous communicating processes.
  • To establish a solid working knowledge of the basic architecture of a typical modern computer system, covering both processor and I/O interfaces.
  • To be familiar with popular multiprocessor system architectures and constraints imposed due to hardware and operating systems.


Transferable skills:

  • Scholarship and research. Students are required to write programs using NQC, this language is not explicitly taught within the module.
  • Oral Communication. Elements of the coursework are assessed by bench presentations.
  • Written Communication. Elements of the coursework are assessed by technical reports.
  • Problem Solving. Programming is an intellectual activity which develops a step-wise approach to problem solving.
  • Write an appropriately formatted technical report describing work undertaken in the laboratory, including a discussion and critical analysis of the results obtained.


 


On completion of this module students should be able to:

Subject specific:

  • Describe fundamental components of computer architecture e.g. ALU, control unit, datapath and instruction set architecture, together with more advanced concepts such as microprogram control structure and instruction pipelines.
  • Describe the organisation of the low-level scheduler in an operating system.
  • Describe the basic hardware and software features of a memory management system, including mechanisms for DMA access.
  • Describe the function and implementation of a primitive inter-process communication (IPC) mechanism, and also to use such a mechanism to build more sophisticated communication and synchronisation patterns.
  • Describe mechanisms for dealing with access to shared resources and demonstrate some of these models by writing Java programs.


Concepts will be introduced during lectures and students consolidate their understanding by completing weekly tests comprising multi-choice questions. More demanding questions are discussed in workshop sessions.

Total hours: 50

Lectures: 24, hours: 24, Content (with provisional weekly schedule)

Introduction to operating systems and I/O concepts

  1. Interrupts
  2. Processes and threads
  3. Process scheduling
  4. Inter process communication
  5. Mutual exclusion
  6. Introduction memory management
  7. Paged and Segmented memory systems
  8. File systems I
  9. File systems II
  10. Security
  11. Revision (BJT)
  12. Logic functions, Boolean Algebra
  13. Minimization of logic functions
  14. Implementation of ALU and data path logic
  15. Von-Neuman model; Datapath Architecture; Register Transfer Language
  16. Instruction Set Architecture
  17. Addressing modes, address space, memory interface
  18. Introduction to assembly language programming
  19. Control Unit Design
  20. Microprogramming
  21. Memory Technology
  22. Multiprocessor and Distributed Systems
  23. Revision (MHF)


Workshops: 10, hours: 10, Content (with provisional weekly schedule)
 

  1. Intro. to C for programming examples
  2. Example threads
  3. Example semaphores
  4. Example interrupt programming
  5. High and low level file access
  6. Boolean Algebra
  7. Design of computer logic
  8. Design of Instruction Sets ? Operation codes
  9. Assembly Language Programming Exercises
  10. Microprogramming Exercises

Laboratory Work: 8, hours: 16, Content (with provisional weekly schedule)
 

  1. Introduction to Altera Quartus
  2. Half Adder
  3. Coursework 1
  4. Coursework 1
  5. Revision of multithreading in Java
  6. Implementation of basic semaphore in Java
  7. Coursework 2
  8. Coursework 2

 


Examination with Coursework or Project